Chaithanya Naik Mude
email:
cs.jtti.citaa.b@esenaii unscramble
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I am a second-year CS Ph.D. student at the University of Wisconsin-Madison, advised by Prof. Swamit Tannu.
My research focuses on designing robust quantum systems, mainly superconducting qubit systems, by leveraging the advancements in machine learning.
Before joining UW-Madison, I worked for a year as a Member of the Technical Staff at VMware India on an
open-sourced project developing Kubernetes operator.
I worked with Prof. Sai Vinjanampathy on quantum control,
Prof. Ashutosh Gupta on minimization of timed automata,
during my Bachelor's and Master's at IIT Bombay.
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Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures
Satvik Maurya, Chaithanya Naik Mude , William D. Oliver, Benjamin Lienhard, Swamit Tannu
ISCA 2023
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abstract |
bibtex |
arXiv
Reading a qubit is a fundamental operation in
quantum computing. It translates quantum information into
classical information enabling subsequent classification to assign
the qubit states ‘0’ or ‘1’. Unfortunately, qubit readout is one
of the most error-prone and slowest operations on a supercon-
ducting quantum processor. On state-of-the-art superconducting
quantum processors, readout errors can range from 1-10%.
These errors occur for various reasons – crosstalk, spontaneous
state transitions, and excitation caused by the readout pulse. The
error-prone nature of readout has resulted in significant research
to design better discriminators to achieve higher qubit-readout
accuracies. The readout accuracy impacts the benchmark fidelity
for Noisy Intermediate Scale Quantum (NISQ) applications or the
logical error rate in error-correcting codes such as the surface
code.
Prior works have used machine-learning-assisted single-shot
qubit-state classification, where a deep neural network was used
for more robust discrimination by compensating for crosstalk
errors. However, the neural network size can limit the scalability
of systems, especially if fast hardware discrimination is required.
This state-of-the-art baseline design cannot be implemented
on off-the-shelf FPGAs used for the control and readout of
superconducting qubits in most systems, which increases the
overall readout latency, since discrimination has to be performed
in software.
In this work, we propose HERQULES , a scalable approach
to improve qubit-state inference by using matched filters in
conjunction with a significantly smaller and scalable neural
network for qubit-state discrimination. We achieve substantially
higher readout accuracies (16.4% relative improvement) than the
baseline with a scalable design that can be readily implemented
on off-the-shelf FPGAs. We also show that HERQULES is more
versatile and can support shorter readout durations than the
baseline design without additional training overheads.
@misc{maurya2022hardware,
title={Hardware Efficient Neural Network Assisted Qubit Readout},
author={Satvik Maurya and Chaithanya Naik Mude and William D. Oliver and Benjamin Lienhard and Swamit Tannu},
year={2022},
eprint={2212.03895},
archivePrefix={arXiv},
primaryClass={quant-ph}
}
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Selected Awards
- Kishore Vaigyanik Protsahan Yojana (KVPY) Fellowship from Govt. of India (2014)
- National Talent Search Examination (NTSE) Scholarship from Govt. of India (2012)
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Misc
- Department General Secretary of Computer Science and Engineering Department (2019-20)
- Summer of Science Mentor of Machine Learning and Computer Vision under MnP club, IIT Bombay (2019-20)
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