Chaithanya Naik Mude

Ph.D. candidate, Computer Sciences, University of Wisconsin–Madison

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About Me

I am a Ph.D. candidate in Computer Sciences at the University of Wisconsin–Madison, working with Prof. Swamit Tannu. My research focuses on cross-layer optimization of superconducting and neutral-atom quantum computing systems to enable high-performance, scalable fault tolerance.

I interned at Quantum Machines, working on calibration and readout for quantum systems. I did my M.S. at UW–Madison, and my M.Tech. and B.Tech. at IIT Bombay, where I was advised by Prof. Sai Vinjanampathy on quantum control.

Outside of research, I enjoy playing badminton, chess, cricket, and table tennis. I also love solving puzzles—Rubik’s cubes, Hanayama, and Tangram—and I like traveling, hiking, and long-distance running.

News

Feb 19, 2026 Presented Enabling Fast and Accurate Neutral Atom Readout via Gen-AI based Image Denoising at the Wisconsin Quantum Institute Colloquium.
Feb 01, 2026 Started as a Product Solutions Research Intern at Quantum Machines (Feb–Aug 2026).
Oct 29, 2025 Efficient Measurement of Neutral-Atom Qubits with Matched Filters has been accepted in Physical Review Applied.
Oct 18, 2025 Accurate Leakage Speculation for Quantum Error Correction has been accepted at MICRO 2025.
Jun 22, 2025 Named a DAC Young Fellow at the 62nd Design Automation Conference.
Jun 22, 2025 Efficient and Scalable Architectures for Multi-level Superconducting Qubit Readout has been accepted at DAC 2025.
Feb 24, 2025 Crosstalk-induced Side Channel Threats in Multi-Tenant NISQ Computers has been accepted at NDSS 2025.
Sep 15, 2024 Understanding Side-Channel Vulnerabilities in Superconducting Qubit Readout Architectures has been accepted at QCE 2024.
Jun 17, 2023 Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures has been accepted at ISCA 2023.

Publications

  1. MICRO
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    Accurate Leakage Speculation for Quantum Error Correction
    Chaithanya Naik Mude and Swamit Tannu
    In 58th IEEE/ACM International Symposium on Microarchitecture, 2025
  2. PRA
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    Efficient Measurement of Neutral-Atom Qubits with Matched Filters
    Robert M. Kent, Linipun Phuttitarn, Chaithanya Naik Mude, Swamit Tannu, Mark Saffman, Gregory Lafyatis, and Daniel J. Gauthier
    Physical Review Applied, 2026
  3. DAC
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    Efficient and Scalable Architectures for Multi-level Superconducting Qubit Readout
    Chaithanya Naik Mude, Satvik Maurya, Benjamin Lienhard, and Swamit Tannu
    In 62nd Design Automation Conference, 2025
  4. NDSS
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    Crosstalk-induced Side Channel Threats in Multi-Tenant NISQ Computers
    Navnil Choudhury, Chaithanya Naik Mude, Sanjay Das, Preetham Tikkireddi, Swamit Tannu, and Kanad Basu
    In Network and Distributed System Security Symposium, 2025
  5. QCE
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    Understanding Side-Channel Vulnerabilities in Superconducting Qubit Readout Architectures
    Satvik Maurya, Chaithanya Naik Mude, Benjamin Lienhard, and Swamit Tannu
    In IEEE International Conference on Quantum Computing and Engineering, 2024
  6. ISCA
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    Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures
    Satvik Maurya, Chaithanya Naik Mude, William D. Oliver, Benjamin Lienhard, and Swamit Tannu
    In 50th International Symposium on Computer Architecture, 2023

Service

  • Systems Architecture for Quantum Measurements (Tutorial, MICRO 2024)
  • ASPLOS 2027 Artifact Evaluation Committee Member
  • MICRO 2026 Artifact Evaluation Committee Member
  • ISCA 2026 Artifact Evaluation Committee Member
  • IEEE Computer Architecture Letters, 2024