Chaithanya Naik Mude
Ph.D. candidate, Computer Sciences, University of Wisconsin–Madison
I am a Ph.D. candidate in Computer Sciences at the University of Wisconsin–Madison, advised by Prof. Swamit Tannu. I work at the intersection of computer architecture and quantum computing: systems that make quantum error correction and qubit readout reliable enough to scale. That includes leakage speculation for QEC (MICRO 2025), hardware-efficient machine learning for superconducting and neutral-atom readout (ISCA 2023, DAC 2025, Phys. Rev. Applied), and crosstalk side channels on multi-tenant machines (NDSS 2025, QCE 2024). I previously completed my M.Tech. and B.Tech. in Computer Science and Engineering at IIT Bombay.
Research interests. Quantum error correction and leakage-aware decoding; superconducting and neutral-atom qubit readout; hardware-efficient ML for quantum control; quantum circuit synthesis; side-channel security of multi-tenant quantum systems.
Currently
- Product Solutions Research Intern at Quantum Machines (Feb 2026–present): calibration of superconducting control stacks and readout pipelines for neutral-atom systems.
- ML decoder for the surface code that folds leakage speculation into decoding and uses adaptive RL to track evolving hardware error profiles.
- Unified adaptive ML (GAIL) for (R_z)/unitary synthesis across dynamic hardware configurations.
news
| Feb 01, 2026 | Started as a Product Solutions Research Intern at Quantum Machines, working on calibration of superconducting control stacks and readout pipelines for neutral-atom systems. |
|---|---|
| Oct 29, 2025 | Efficient Measurement of Neutral-Atom Qubits with Matched Filters appeared in Physical Review Applied. |
| Oct 18, 2025 | Accurate Leakage Speculation for Quantum Error Correction appeared at MICRO 2025 in Seoul. |
| Jun 22, 2025 | Efficient and Scalable Architectures for Multi-level Superconducting Qubit Readout appeared at DAC 2025. Named a DAC Young Fellow. |
| Feb 24, 2025 | Crosstalk-induced Side Channel Threats in Multi-Tenant NISQ Computers appeared at NDSS 2025. |
selected publications
- Efficient and Scalable Architectures for Multi-level Superconducting Qubit ReadoutIn 62nd Design Automation Conference, 2025
- Understanding Side-Channel Vulnerabilities in Superconducting Qubit Readout ArchitecturesIn IEEE International Conference on Quantum Computing and Engineering, 2024